A Compact Device Model for Nanoparticle-organic Memory Transistor’s Characterization

Huy Van Mai, Olivier Bichler, Christian Gamrat, Yannick Viero, Fabien Alibart, Dominique Vuillaume


Neuromorphic electronic devices have recently been a candidate for new computing architecture associated with innovative nanotechnologies. A report of the characterization of Nanoparticle organic memory transistor (NOMFET) introduced a similar behavior to a biological spiking synapse in neural networks. In this paper, a refinement model based on the extracted parameters including a hybrid NOMFET/CMOS neuromorphic computing circuit and architecture of synapse to neuron interface by characterizing transistor -- memory and the temporal dynamic function is presented. A compact EKV model refinement serves as a link between nanotechnology process and circuit design for novel CMOS devices.


dynamics, hybrid integrated circuit, modeling, nanotechnology, neural networks, synapse-like nanodevices, EKV model

Full Text:



F. Alibart, S. Pleutin, O. Bichler, C. Gamrat, T. Serrano-Gotarredona, B. Linares-Barranco, and D. Vuillaume, Adv. Funct. Mater, 22 (2012) 609–616.

C. Novembre, D. Guérin, K. Lmimouni, C. Gamrat, and D. Vuillaume, Appl. Phys. Lett., 92 (2008), 103-314.

F. Alibart, S. Pleutin, D. Guerin, C. Novembre, S. Lenfant, K. Lmimouni, C. Garamrat, and D. Vuillaume, Adv. Funct. Mater, 20, (2010) 330-337.

O. Bichler, W. Zhao, F. Alibart, S. Pleutin, D. Vuillaume, and C. Gamrat, IEE Trans. Electron Devices, 57 (2010) 3115-3122.

T. Serrano-Gotarredona, B. Linares-Barranco, G. Agnus, V. Derycke, J-P. Bourgoin, F. Alibart, D. Vuillaume, J. Sohn, J. Bendall, M. E. Welland, and C. Gamrat, “Fast and compact simulation models for a variety of fet nano devices by the CMOS EKV equations”, 9th IEEE conference on Nanotechnology (2009).

G. Vicente-Sánchez, et al., « A weak-to-strong inversion mismatch model for analog circuit design” Int. J. Analog Int. Circ., (2008).

Kyoung-Cheol Kwon, Jong-Sun Lee, Chul Geun Kim and Jea-Gun Park, Appl. Phys. Express, 6 (2013) 067001.

Enz, C. C., Krummenacher, F., & Vittoz, E. A, Analog Integrated Circuits and Signal Processing, 8 (1995), 83–114.

Tsodyks, M., K. Pawelzik, and H. Markram, Neural Computation, 10 (1998) 821–835.

Abbott, L., J. Varela, K. Sen, and S. Nelson, Science 275 (1997) 220–224.

Oguey, H. J., & Cserveny, S. “MOS modelling at low current density”, Summer course on process and device modelling. Belgium: ESAT Leuven-Heverlee (1983).

Enz, Christian, et al. "The foundations of the EKV MOS transistor charge-based model." Threshold 1 (2002)

Enz, Christian C. "A short story of the EKV MOS transistor model." Solid-State Circuits Society Newsletter, IEEE 13.3 (2008) 24-30.

C. H. Chenming, “Modern semiconductor devices for integrated circuits.” Prentice Hall (2009).

DOI: https://doi.org/10.15625/0868-3166/28/3/12359


  • There are currently no refbacks.

Editorial Office:

Communications in Physics

1st Floor, A16 Building, 18B Hoang Quoc Viet Street, Cau Giay District, Hanoi, Vietnam

Tel: (+84) 024 3791 7102 

Email: cip@vjs.ac.vn

Copyright by